1. Field of the Invention
This invention relates to a direct memory access control system with byte/word control of a data bus, and more particularly to a direct memory access control system for a data processor having a central processing unit part, input/output control ports and a memory respectively connected to the data bus and permitting direct access of the input/output control ports to the memory, in which a direct memory access control unit is provided for the management of the direct memory access and a byte-unit transfer can be controlled.
2. Description of the Prior Art
In ordinary one-chip computers, use is rarely made of only a CPU chip, but they are used in combination with peripheral device chips. Accordingly, one or more input/output control port chips, memory chips, etc. are usually connected to a data bus in association with the CPU chip. The input/output control ports used are classified into those having a function of direct memory access (hereinafter referred to as DMA) and those having no such function. Further, they are divided into those having a bus width of one byte between them and the input/output devices, and those having a bus width of one word, that is, two bytes. In this case, it is inadvisable to form the input/output control ports with chips of different constructions respectively corresponding to required functions. It is desired to form the input/output control ports with chips of the same construction.
In such a case, when data is transferred between the input/output control port and the input/output device, the former usually produces a control signal for guaranteeing the data transferred, and it is necessary to change the pulse width of the control signal in accordance with the kind of input/output device and the distance thereto.
Further, each part is required to send and receive several kinds of control signals so as to have various functions but there arises a problem in that a large number of input/output terminal pins cannot be provided on an LSI chip. Moreover, the data sending and receiving operation of the input/output control port has a plurality of modes and it is necessary to comply with this.